diff options
| author | Raymaekers Luca <luca@spacehb.net> | 2025-11-12 18:52:38 +0100 |
|---|---|---|
| committer | Raymaekers Luca <luca@spacehb.net> | 2025-11-12 18:52:38 +0100 |
| commit | d4f6774c172ac1e7c193fc4e89230c873d179c2b (patch) | |
| tree | 049b855ac7b68482dc9e1e35b339f5b4d18d675b /src/sim86/libs/reference_decoder/sim86_instruction.h | |
| parent | e20d69ffb1f5676bb7960ac4d71c1013e4582149 (diff) | |
checkpoint
Diffstat (limited to 'src/sim86/libs/reference_decoder/sim86_instruction.h')
| -rw-r--r-- | src/sim86/libs/reference_decoder/sim86_instruction.h | 109 |
1 files changed, 109 insertions, 0 deletions
diff --git a/src/sim86/libs/reference_decoder/sim86_instruction.h b/src/sim86/libs/reference_decoder/sim86_instruction.h new file mode 100644 index 0000000..191635a --- /dev/null +++ b/src/sim86/libs/reference_decoder/sim86_instruction.h @@ -0,0 +1,109 @@ +/* ======================================================================== + + (C) Copyright 2023 by Molly Rocket, Inc., All Rights Reserved. + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Please see https://computerenhance.com for more information + + ======================================================================== */ + +typedef u32 register_index; + +// NOTE(casey): To make it easier to compile with languages which do not +// have auto-typedef'ing (like C, etc.), all types are manually typedef'd here. +typedef struct register_access register_access; +typedef struct effective_address_term effective_address_term; +typedef struct effective_address_expression effective_address_expression; +typedef struct immediate immediate; +typedef struct instruction_operand instruction_operand; +typedef struct instruction instruction; + +typedef enum operation_type : u32 +{ + Op_None, + +#define INST(Mnemonic, ...) Op_##Mnemonic, +#define INSTALT(...) +#include "sim86_instruction_table.inl" + + Op_Count, +} operation_type; + +enum instruction_flag +{ + Inst_Lock = 0x1, + Inst_Rep = 0x2, + Inst_Segment = 0x4, + Inst_Wide = 0x8, + Inst_Far = 0x10, + Inst_RepNE = 0x20, // NOTE(casey): For user convenience, this will be set _in addition to_ Inst_Rep for REPNE/REPNZ +}; + +struct register_access +{ + register_index Index; + u32 Offset; + u32 Count; +}; + +struct effective_address_term +{ + register_access Register; + s32 Scale; +}; + +enum effective_address_flag +{ + Address_ExplicitSegment = 0x1, +}; +struct effective_address_expression +{ + effective_address_term Terms[2]; + u32 ExplicitSegment; + s32 Displacement; + u32 Flags; +}; + +enum immediate_flag +{ + Immediate_RelativeJumpDisplacement = 0x1, +}; +struct immediate +{ + s32 Value; + u32 Flags; +}; + +typedef enum operand_type : u32 +{ + Operand_None, + Operand_Register, + Operand_Memory, + Operand_Immediate, +} operand_type; +struct instruction_operand +{ + operand_type Type; + union + { + effective_address_expression Address; + register_access Register; + immediate Immediate; + }; +}; + +struct instruction +{ + u32 Address; + u32 Size; + + operation_type Op; + u32 Flags; + + instruction_operand Operands[2]; + + register_index SegmentOverride; +}; |
