diff options
| author | Raymaekers Luca <luca@spacehb.net> | 2025-10-15 11:51:03 +0200 |
|---|---|---|
| committer | Raymaekers Luca <luca@spacehb.net> | 2025-10-15 11:51:03 +0200 |
| commit | 0982906027721c71307e234d6f14f886bdca47c5 (patch) | |
| tree | 46bb166afe8a5f63412c62beb69879b101ec9847 /src | |
| parent | 323a04b6e38a9456977551fa49f7031229c7abdd (diff) | |
checkpoint
Diffstat (limited to 'src')
18 files changed, 166 insertions, 0 deletions
diff --git a/src/build/sim86 b/src/build/sim86 Binary files differindex 16e2bdd..d8ce0a1 100755 --- a/src/build/sim86 +++ b/src/build/sim86 diff --git a/src/code/sim86.cpp b/src/code/sim86.cpp index 8ea8453..75e1e93 100644 --- a/src/code/sim86.cpp +++ b/src/code/sim86.cpp @@ -20,6 +20,7 @@ internal void Run8086(psize DisassemblySize, u8 *Disassembly) { s32 Registers[Register_count] = {}; + u32 Flags = 0; u32 Offset = 0; while(Offset < DisassemblySize) @@ -96,7 +97,61 @@ Run8086(psize DisassemblySize, u8 *Disassembly) printf(" ; %s:0x%x->0x%x", Sim86_RegisterNameFromOperand(&Decoded.Operands[0].Register), Old, *Destination); #endif + } + else if(Decoded.Op == Op_cmp) + { + Assert(0 && "cmp has not been implemented yet"); + } + else if(Decoded.Op == Op_sub) + { + s32 *Destination = 0; + s32 *Source = 0; + + if(0) {} + else if(Decoded.Operands[0].Type == Operand_Register) + { + Destination = Registers + Decoded.Operands[0].Register.Index; + } + else + { + Assert(0 && "Destination must be a register"); + } + + if(0) {} + else if(Decoded.Operands[1].Type == Operand_Register) + { + Source = Registers + Decoded.Operands[1].Register.Index; + } + else if(Decoded.Operands[1].Type == Operand_Immediate) + { + Source = &Decoded.Operands[1].Immediate.Value; + } + else + { + Assert(1 && "Substraction from memory address is not implemented yet."); + } + + Assert(0 && "sub has not been implemented yet"); + *Destination = (u16)((u16)(*Destination) - ((u16)(*Source))); + if(*Destination & (1 << 15)) + { + Flags |= Flag_Sign; + } + + if(*Destination == 0) + { + Flags |= Flag_Zero; + } + else + { + Flags &= (~Flag_Zero); + } + + } + else if(Decoded.Op == Op_add) + { + Assert(0 && "add has not been implemented yet"); } else { diff --git a/src/code/sim86.h b/src/code/sim86.h index 2a3427e..5beef0b 100644 --- a/src/code/sim86.h +++ b/src/code/sim86.h @@ -35,5 +35,11 @@ enum register_mapping_8086 Register_count, }; +enum flags_8086 +{ + Flag_Zero = 0x1, + Flag_Sign = 0x2, +}; + #endif //SIM86_H diff --git a/src/data/listing_0046_add_sub_cmp b/src/data/listing_0046_add_sub_cmp new file mode 100644 index 0000000..ba7e73d --- /dev/null +++ b/src/data/listing_0046_add_sub_cmp @@ -0,0 +1 @@ +)˼9
\ No newline at end of file diff --git a/src/data/listing_0046_add_sub_cmp.asm b/src/data/listing_0046_add_sub_cmp.asm new file mode 100644 index 0000000..287e958 --- /dev/null +++ b/src/data/listing_0046_add_sub_cmp.asm @@ -0,0 +1,29 @@ +; ======================================================================== +; +; (C) Copyright 2023 by Molly Rocket, Inc., All Rights Reserved. +; +; This software is provided 'as-is', without any express or implied +; warranty. In no event will the authors be held liable for any damages +; arising from the use of this software. +; +; Please see https://computerenhance.com for further information +; +; ======================================================================== + +; ======================================================================== +; LISTING 46 +; ======================================================================== + +bits 16 + +mov bx, -4093 +mov cx, 3841 +sub bx, cx + +mov sp, 998 +mov bp, 999 +cmp bp, sp + +add bp, 1027 +sub bp, 2026 + diff --git a/src/data/listing_0046_add_sub_cmp.txt b/src/data/listing_0046_add_sub_cmp.txt new file mode 100644 index 0000000..4b27dba --- /dev/null +++ b/src/data/listing_0046_add_sub_cmp.txt @@ -0,0 +1,16 @@ +--- test\listing_0046_add_sub_cmp execution --- +mov bx, 61443 ; bx:0x0->0xf003 +mov cx, 3841 ; cx:0x0->0xf01 +sub bx, cx ; bx:0xf003->0xe102 flags:->S +mov sp, 998 ; sp:0x0->0x3e6 +mov bp, 999 ; bp:0x0->0x3e7 +cmp bp, sp ; flags:S-> +add bp, 1027 ; bp:0x3e7->0x7ea +sub bp, 2026 ; bp:0x7ea->0x0 flags:->PZ + +Final registers: + bx: 0xe102 (57602) + cx: 0x0f01 (3841) + sp: 0x03e6 (998) + flags: PZ + diff --git a/src/data/listing_0047_challenge_flags b/src/data/listing_0047_challenge_flags Binary files differnew file mode 100644 index 0000000..58edaa0 --- /dev/null +++ b/src/data/listing_0047_challenge_flags diff --git a/src/data/listing_0047_challenge_flags.asm b/src/data/listing_0047_challenge_flags.asm new file mode 100644 index 0000000..0a4cd1f --- /dev/null +++ b/src/data/listing_0047_challenge_flags.asm @@ -0,0 +1,36 @@ +; ======================================================================== +; +; (C) Copyright 2023 by Molly Rocket, Inc., All Rights Reserved. +; +; This software is provided 'as-is', without any express or implied +; warranty. In no event will the authors be held liable for any damages +; arising from the use of this software. +; +; Please see https://computerenhance.com for further information +; +; ======================================================================== + +; ======================================================================== +; LISTING 47 +; ======================================================================== + +bits 16 + +add bx, 30000 +add bx, 10000 +sub bx, 5000 +sub bx, 5000 + +mov bx, 1 +mov cx, 100 +add bx, cx + +mov dx, 10 +sub cx, dx + +add bx, 40000 +add cx, -90 + +mov sp, 99 +mov bp, 98 +cmp bp, sp diff --git a/src/data/listing_0047_challenge_flags.txt b/src/data/listing_0047_challenge_flags.txt new file mode 100644 index 0000000..d33a1ca --- /dev/null +++ b/src/data/listing_0047_challenge_flags.txt @@ -0,0 +1,23 @@ +--- test\listing_0047_challenge_flags execution --- +add bx, 30000 ; bx:0x0->0x7530 flags:->P +add bx, 10000 ; bx:0x7530->0x9c40 flags:P->SO +sub bx, 5000 ; bx:0x9c40->0x88b8 flags:SO->PAS +sub bx, 5000 ; bx:0x88b8->0x7530 flags:PAS->PO +mov bx, 1 ; bx:0x7530->0x1 +mov cx, 100 ; cx:0x0->0x64 +add bx, cx ; bx:0x1->0x65 flags:PO->P +mov dx, 10 ; dx:0x0->0xa +sub cx, dx ; cx:0x64->0x5a flags:P->PA +add bx, 40000 ; bx:0x65->0x9ca5 flags:PA->PS +add cx, -90 ; cx:0x5a->0x0 flags:PS->CPAZ +mov sp, 99 ; sp:0x0->0x63 +mov bp, 98 ; bp:0x0->0x62 +cmp bp, sp ; flags:CPAZ->CPAS + +Final registers: + bx: 0x9ca5 (40101) + dx: 0x000a (10) + sp: 0x0063 (99) + bp: 0x0062 (98) + flags: CPAS + diff --git a/src/data/listing_0043_immediate_movs b/src/data/simulating_non_memory_movs/listing_0043_immediate_movs Binary files differindex a965538..a965538 100644 --- a/src/data/listing_0043_immediate_movs +++ b/src/data/simulating_non_memory_movs/listing_0043_immediate_movs diff --git a/src/data/listing_0043_immediate_movs.asm b/src/data/simulating_non_memory_movs/listing_0043_immediate_movs.asm index 475afaf..475afaf 100644 --- a/src/data/listing_0043_immediate_movs.asm +++ b/src/data/simulating_non_memory_movs/listing_0043_immediate_movs.asm diff --git a/src/data/listing_0043_immediate_movs.txt b/src/data/simulating_non_memory_movs/listing_0043_immediate_movs.txt index fb36287..fb36287 100644 --- a/src/data/listing_0043_immediate_movs.txt +++ b/src/data/simulating_non_memory_movs/listing_0043_immediate_movs.txt diff --git a/src/data/listing_0044_register_movs b/src/data/simulating_non_memory_movs/listing_0044_register_movs Binary files differindex 346ff45..346ff45 100644 --- a/src/data/listing_0044_register_movs +++ b/src/data/simulating_non_memory_movs/listing_0044_register_movs diff --git a/src/data/listing_0044_register_movs.asm b/src/data/simulating_non_memory_movs/listing_0044_register_movs.asm index 58988fe..58988fe 100644 --- a/src/data/listing_0044_register_movs.asm +++ b/src/data/simulating_non_memory_movs/listing_0044_register_movs.asm diff --git a/src/data/listing_0044_register_movs.txt b/src/data/simulating_non_memory_movs/listing_0044_register_movs.txt index e46c56c..e46c56c 100644 --- a/src/data/listing_0044_register_movs.txt +++ b/src/data/simulating_non_memory_movs/listing_0044_register_movs.txt diff --git a/src/data/listing_0045_challenge_register_movs b/src/data/simulating_non_memory_movs/listing_0045_challenge_register_movs index dd781b2..dd781b2 100644 --- a/src/data/listing_0045_challenge_register_movs +++ b/src/data/simulating_non_memory_movs/listing_0045_challenge_register_movs diff --git a/src/data/listing_0045_challenge_register_movs.asm b/src/data/simulating_non_memory_movs/listing_0045_challenge_register_movs.asm index 9e25fda..9e25fda 100644 --- a/src/data/listing_0045_challenge_register_movs.asm +++ b/src/data/simulating_non_memory_movs/listing_0045_challenge_register_movs.asm diff --git a/src/data/listing_0045_challenge_register_movs.txt b/src/data/simulating_non_memory_movs/listing_0045_challenge_register_movs.txt index 66c8c7b..66c8c7b 100644 --- a/src/data/listing_0045_challenge_register_movs.txt +++ b/src/data/simulating_non_memory_movs/listing_0045_challenge_register_movs.txt |
