summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rwxr-xr-xsrc/build.sh7
-rw-r--r--src/clocks_table.inl51
-rw-r--r--src/generated/generated.cpp13
-rw-r--r--src/sim86.cpp153
-rw-r--r--src/sim86.h23
-rw-r--r--src/sim86.mdesk22
-rw-r--r--src/sim86_meta.c7
7 files changed, 208 insertions, 68 deletions
diff --git a/src/build.sh b/src/build.sh
index 8cfb982..7726aee 100755
--- a/src/build.sh
+++ b/src/build.sh
@@ -28,17 +28,14 @@ WarningFlags="
-Wno-write-strings
"
-Libs="./libs/reference_decoder/sim86_lib.cpp"
-
printf '[metadata generation]\n'
-Source="sim86_meta.c"
$Compiler $CompilerFlags $WarningFlags \
-o ../build/sim86_meta \
- $Source
+ sim86_meta.c
../build/sim86_meta ./sim86.mdesk > ./generated/generated.cpp
printf '[%s build]\n' "$Compiler"
Source="sim86.cpp"
$Compiler $CompilerFlags $WarningFlags \
-o ../build/sim86 \
- $Libs $Source
+ sim86.cpp
diff --git a/src/clocks_table.inl b/src/clocks_table.inl
new file mode 100644
index 0000000..2c07bb3
--- /dev/null
+++ b/src/clocks_table.inl
@@ -0,0 +1,51 @@
+
+enum instruction_clocks_operand_type
+{
+ InstructionClocksOperand_None = 0,
+ InstructionClocksOperand_Memory,
+ InstructionClocksOperand_Immediate,
+ InstructionClocksOperand_Accumulator,
+ InstructionClocksOperand_Register,
+ InstructionClocksOperand_Count
+};
+
+struct instruction_clocks
+{
+ operation_type Op;
+ instruction_clocks_operand_type Operands[2];
+ u32 Clocks;
+ u32 Transfers;
+ b32 EffectiveAddress;
+};
+
+#define Memory InstructionClocksOperand_Memory
+#define Immediate InstructionClocksOperand_Immediate
+#define Accumulator InstructionClocksOperand_Accumulator
+#define Register InstructionClocksOperand_Register
+#define None InstructionClocksOperand_None
+
+// NOTE(luca): Instructions containing accumulator should be put first so they have precedence
+// on instructions with registers (accumulator is a register).
+instruction_clocks ClocksTable[] =
+{
+ { Op_mov, { Memory, Accumulator }, 10, 1, false },
+ { Op_mov, { Accumulator, Memory }, 10, 1, false },
+ { Op_mov, { Register, Register }, 2, 0, false },
+ { Op_mov, { Register, Memory }, 8, 1, true },
+ { Op_mov, { Memory, Register }, 9, 1, true },
+ { Op_mov, { Register, Immediate }, 4, 0, false },
+ { Op_mov, { Memory, Immediate }, 10, 1, true },
+
+ { Op_add, { Accumulator, Immediate }, 4, 0, false },
+ { Op_add, { Register, Register }, 3, 0, false },
+ { Op_add, { Register, Memory }, 9, 1, true },
+ { Op_add, { Memory, Register }, 16, 2, true },
+ { Op_add, { Register, Immediate }, 4, 0, false },
+ { Op_add, { Memory, Immediate }, 17, 2, true },
+};
+
+#undef Memory
+#undef Register
+#undef None
+#undef Accumulator
+#undef Immediate \ No newline at end of file
diff --git a/src/generated/generated.cpp b/src/generated/generated.cpp
index 1ad803c..0f457a1 100644
--- a/src/generated/generated.cpp
+++ b/src/generated/generated.cpp
@@ -1,16 +1,3 @@
-enum flags_songs
-{
- Flag_French = (1 << 0),
- Flag_Russian = (1 << 1),
-};
-
-int songs_strings_count = 2;
-char *songs_strings[] =
-{
- "French Blues",
- "Russian Blues",
-};
-
enum flags_8086
{
Flag_Carry = (1 << 0),
diff --git a/src/sim86.cpp b/src/sim86.cpp
index ba9e252..e5480d7 100644
--- a/src/sim86.cpp
+++ b/src/sim86.cpp
@@ -1,9 +1,10 @@
#include <stdio.h>
#include <string.h>
-#include "sim86.h"
-#include "sim86_shared.h"
+#include "./libs/reference_decoder/sim86_lib.cpp"
+#include "sim86.h"
+#include "clocks_table.inl"
#include "generated/generated.cpp"
global_variable u8 GlobalMemory[1*1024*1024] = {};
@@ -82,6 +83,19 @@ FlagsFromValue(u32 *FlagsRegister, u32 InstructionFlags, s32 Value)
}
}
+s32 GetCompleteDisplacement(s32 *Registers, instruction_operand *Operand)
+{
+ s32 CompleteDisplacement = Operand->Address.Displacement;
+
+ u32 Count = Operand->Address.Terms[0].Register.Count;
+ u32 Mask = ((u32)((-1)) >> (16 + (16 - Count*8)));
+ CompleteDisplacement +=
+ (Registers[Operand->Address.Terms[0].Register.Index] & Mask) +
+ (Registers[Operand->Address.Terms[1].Register.Index] & Mask);
+
+ return CompleteDisplacement;
+}
+
internal s32 *
OperandToValue(s32 *Registers, u8 *Memory, instruction_operand *Operand)
{
@@ -94,16 +108,7 @@ OperandToValue(s32 *Registers, u8 *Memory, instruction_operand *Operand)
}
else if(Operand->Type == Operand_Memory)
{
- s32 CompleteDisplacement = Operand->Address.Displacement;
- Assert(Operand->Address.Terms[0].Register.Count == Operand->Address.Terms[1].Register.Count);
-
- u32 Count = Operand->Address.Terms[0].Register.Count;
- u32 Mask = ((u32)((-1)) >> (16 + (16 - Count*8)));
-
- CompleteDisplacement +=
- (Registers[Operand->Address.Terms[0].Register.Index] & Mask) +
- (Registers[Operand->Address.Terms[1].Register.Index] & Mask);
-
+ s32 CompleteDisplacement = GetCompleteDisplacement(Registers, Operand);
Result = (s32 *)((u8 *)Memory + CompleteDisplacement);
}
else if(Operand->Type == Operand_Immediate)
@@ -118,12 +123,32 @@ OperandToValue(s32 *Registers, u8 *Memory, instruction_operand *Operand)
return Result;
}
+b32 IsAccumulator(instruction_operand *Operand)
+{
+ b32 Result = ((Operand->Type == Operand_Register) &&
+ (Operand->Register.Index == Register_a));
+ return Result;
+}
+
+b32 IsMatchingOp(instruction_operand *Operand, instruction_clocks_operand_type Type)
+{
+ b32 Matching = false;
+
+ Matching = Matching || (Type == InstructionClocksOperand_Memory && Operand->Type == Operand_Memory);
+ Matching = Matching || (Type == InstructionClocksOperand_Register && Operand->Type == Operand_Register);
+ Matching = Matching || (Type == InstructionClocksOperand_Accumulator && IsAccumulator(Operand));
+ Matching = Matching || (Type == InstructionClocksOperand_Immediate && Operand->Type == Operand_Immediate);
+
+ return Matching;
+}
+
internal void
Run8086(psize MemorySize, u8 *Memory)
{
s32 Registers[Register_count] = {};
u32 FlagsRegister = 0;
u32 IPRegister = 0;
+ u32 ElapsedClocks = 0;
while(IPRegister < MemorySize)
{
@@ -135,12 +160,110 @@ Run8086(psize MemorySize, u8 *Memory)
IPRegister += Decoded.Size;
#if SIM86_INTERNAL
- printf("Size:%u Op:%s Flags:0x%x ;", Decoded.Size, Sim86_MnemonicFromOperationType(Decoded.Op), Decoded.Flags);
+ printf("%s ;", Sim86_MnemonicFromOperationType(Decoded.Op));
#endif
instruction_operand *DestinationOperand = Decoded.Operands + 0;
instruction_operand *SourceOperand = Decoded.Operands + 1;
+ u32 AddedClocks = 0;
+ for(u32 ClocksIndex = 0;
+ ClocksIndex < ArrayCount(ClocksTable);
+ ClocksIndex++)
+ {
+ instruction_clocks *Clocks = ClocksTable + ClocksIndex;
+
+ b32 Matching = Decoded.Op == Clocks->Op;
+ Matching = Matching && IsMatchingOp(DestinationOperand, Clocks->Operands[0]);
+ Matching = Matching && IsMatchingOp(SourceOperand, Clocks->Operands[1]);
+ if(Matching)
+ {
+ AddedClocks += Clocks->Clocks;
+
+ if(Clocks->EffectiveAddress)
+ {
+ instruction_operand *MemoryOperand = ((DestinationOperand->Type == Operand_Memory) ? DestinationOperand : SourceOperand);
+ u32 FirstIndex = MemoryOperand->Address.Terms[0].Register.Index;
+ u32 SecondIndex = MemoryOperand->Address.Terms[1].Register.Index;
+
+ // Only displacement
+ if(FirstIndex == 0 && SecondIndex == 0)
+ {
+ AddedClocks += 6;
+ }
+ // Base or index
+ else if(FirstIndex == 0 || SecondIndex == 0)
+ {
+ // Base or index only
+ if(MemoryOperand->Address.Displacement == 0)
+ {
+ AddedClocks += 5;
+ }
+ // Base or index + displacement
+ else
+ {
+ AddedClocks += 9;
+ }
+ }
+ // Base + index
+ else if(MemoryOperand->Address.Displacement == 0)
+ {
+ /*
+ bp+di bx+si 7
+ bp+si bx+di 8
+ */
+ if((FirstIndex == Register_bp && SecondIndex == Register_di) ||
+ (FirstIndex == Register_b && SecondIndex == Register_si))
+ {
+ AddedClocks += 7;
+ }
+ else
+ {
+ AddedClocks += 8;
+ }
+ }
+ // Base + index + displacement
+ else
+ {
+ /*
+ bp+di bx+si 11
+ bp+si bx+di 12
+ */
+ if((FirstIndex == Register_bp && SecondIndex == Register_di) ||
+ (FirstIndex == Register_b && SecondIndex == Register_si))
+ {
+ AddedClocks += 11;
+ }
+ else
+ {
+ AddedClocks += 12;
+ }
+ }
+
+ }
+
+ // Add transfer penalty
+ if(Clocks->Transfers && (Decoded.Flags & Inst_Wide))
+ {
+ instruction_operand *MemoryOperand = ((DestinationOperand->Type == Operand_Memory) ? DestinationOperand : SourceOperand);
+ s32 Displacement = GetCompleteDisplacement(Registers, MemoryOperand);
+ if(Displacement & 1)
+ {
+ AddedClocks += 4*Clocks->Transfers;
+ }
+ }
+
+ break;
+ }
+ }
+
+#if 0
+ Assert(AddedClocks);
+#endif
+
+ ElapsedClocks += AddedClocks;
+ printf(" clocks: +%d = %d", AddedClocks, ElapsedClocks);
+
s32 *Destination = OperandToValue(Registers, Memory, DestinationOperand);
s32 *Source = OperandToValue(Registers, Memory, SourceOperand);
@@ -207,8 +330,6 @@ Run8086(psize MemorySize, u8 *Memory)
}
else if(Decoded.Op == Op_add)
{
- Assert(DestinationOperand->Type == Operand_Register);
-
s32 Old = *Destination;
*Destination = ((Decoded.Flags & Inst_Wide) ?
@@ -257,7 +378,7 @@ Run8086(psize MemorySize, u8 *Memory)
}
- printf("Final registers:\n");
+ printf("\nFinal registers:\n");
for(u32 RegisterIndex = Register_a;
RegisterIndex < Register_ds + 1;
RegisterIndex++)
diff --git a/src/sim86.h b/src/sim86.h
index d24cb70..24068e2 100644
--- a/src/sim86.h
+++ b/src/sim86.h
@@ -12,27 +12,4 @@ typedef size_t psize;
#define Assert(Expression) if(!(Expression)) { __asm__ volatile("int3"); }
#define ArrayCount(Array) (sizeof(Array) / sizeof((Array)[0]))
-//~ Stolen from the decoder.
-enum register_mapping_8086
-{
- Register_none,
-
- Register_a,
- Register_b,
- Register_c,
- Register_d,
- Register_sp,
- Register_bp,
- Register_si,
- Register_di,
- Register_es,
- Register_cs,
- Register_ss,
- Register_ds,
- Register_ip,
- Register_flags,
-
- Register_count,
-};
-
#endif //SIM86_H
diff --git a/src/sim86.mdesk b/src/sim86.mdesk
index 6de46fc..0635110 100644
--- a/src/sim86.mdesk
+++ b/src/sim86.mdesk
@@ -1,4 +1,3 @@
-
@table(name, str) sim86_flags_mapping:
{
{ Carry, "C", }
@@ -12,21 +11,22 @@
{ Trap, "T", }
}
-@table(name, title) songs:
-{
- { French, "French Blues" },
- { Russian, "Russian Blues" },
-}
-
-@table_gen_enum_flags(songs, name) flags_songs
-@table_gen_data(songs, `char *`, title) songs_strings
-
@table_gen_enum_flags(sim86_flags_mapping, name) flags_8086
@table_gen_data(sim86_flags_mapping, `char *`, str) flags_8086_strings
+// TODO:
@table_gen_enum sim86_enum:
{
@expand(sim86_flags_mapping mapping)
`Sim86_$(mapping.name),`
`Sim86_Count`
-} \ No newline at end of file
+}
+
+@table(mnemonic, encoding, clocks, name) instructions_table:
+{
+ { mov, [ B:100010, D, W, MOD, REG, RM ], 4, "Register/memory to/from register" }
+ { mov, [ B:1100011, W, MOD, B:000, RM, ImpD:0, DATA, DATA_IF_W ], 5, "Immediate to register/memory" }
+ { mov, [ B:1011, W, REG, ImpD:1 ], 3, "Immediate to register" }
+}
+
+
diff --git a/src/sim86_meta.c b/src/sim86_meta.c
index f5046a7..c8fe8f3 100644
--- a/src/sim86_meta.c
+++ b/src/sim86_meta.c
@@ -123,6 +123,13 @@ int main(int ArgsCount, char *Args[])
MD_S8ListPush(Arena, &Stream, MD_S8Lit("};\n\n"));
}
+#if 0
+ if(MD_NodeHasTag(Node, MD_S8Lit("table"), 0))
+ {
+ Assert(0);
+ }
+#endif
+
if(MD_NodeHasTag(Node, MD_S8Lit("table_gen_enum"), 0))
{
// Header
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-11-25 20:04:33 +0000